--- a/me8100.h	Wed Jan 16 14:02:54 2002 +0100
+++ b/me8100.h	Wed Jan 16 15:54:58 2002 +0100
@@ -47,11 +47,12 @@
 
 /* Please define this to enable debug mode */
 #undef ME8100_DEBUG
+#define ME8100_DEBUG
 
 #undef PDEBUG // only to be sure
 
 #ifdef ME8100_DEBUG
-# define PDEBUG(fmt, args...) printk(KERN_DEBUG"ME8100:" fmt, ##args)
+# define PDEBUG(fmt, args...) printk(KERN_DEBUG"ME8100: %d " fmt, current->pid, ##args)
 #else 
 # define PDEBUG(fmt, args...) // no debugging, do nothing
 #endif
@@ -101,10 +102,38 @@
 // Bit 6   INTB 0      ISA has here INTB 1
 // Bit 7   ENIO        1 = Enable  0 = high resistance
 // Bit 8-15 dont care
+// +---------------------------------------+
+// | 15 | 14 | 13 | 12 | 11 | 10 |  9 |  8 |
+// +---------------------------------------+
+// |    |    |    |    |    |    |    |    |
+// +---------------------------------------+
+//
+// +---------------------------------------+
+// |  7 |  6 |  5 |  4 |  3 |  2 |  1 |  0 |
+// +---------------------------------------+
+// |ENIO|INTB|INTB|SRC/|    |    |    |    |
+// |    |   0|   1|SINK|    |    |    |    |
+// +---------------------------------------+
+//   |     |    |   `-- 0  SINK
+//   |     |    |       1  SOURCE
+//   |     `----`------ 00 INT off
+//   |                  01 INT on pattern
+//   |                  10 INT on masked change
+//   |                  11 INT off
+//   `----------------- 0  IO enable
+//                      1  IO disable (high resistance)
 /*********************************************************/
 /* The ME8100_ID_REG_X contains on PCI boards static 81h */
 /*********************************************************/
 
+/* Some definitions to be written to the CTRL register */
+#define ME8100_CTL_ENIO		0x80
+#define ME8100_CTL_SOURCE	0x10
+#define ME8100_CTL_SINK		0x00
+
+#define ME8100_CTL_IRQ_PATTERN	0x40
+#define ME8100_CTL_IRQ_MASK	0x60
+
 /* ME8100 Register Set A */
 #define ME8100_ID_REG_A			0x00      //(r, )
 #define ME8100_CTRL_REG_A		0x00      //( ,w)
@@ -114,6 +143,7 @@
 #define ME8100_PATTERN_REG_A		0x08      //( ,w)
 #define ME8100_MASK_REG_A		0x0A      //( ,w)
 #define ME8100_INT_DI_REG_A		0x0A      //(r, )
+
 									
 /* ME8100 Register Set B */		
 #define ME8100_ID_REG_B			0x0C      //(r, )
@@ -155,6 +185,7 @@
   int int2;
 } me8100_int_occur_type;
 
+#ifdef __KERNEL__
 
 typedef struct{
   int board_count;                  /* index of the board after detection    */
@@ -178,8 +209,10 @@
   int board_in_use;                 /* Indicates if board is already in use  */
   spinlock_t use_lock;              /* Guards board in use                   */
   struct file *file_ptr;            /* Pointer to file structure of path     */
+  struct fasync_struct *fasync_ptr; /* .hs */
 } me8100_info_type;
 
+#endif	/* __KERNEL__ */
 
 /* ME8100 IOCTL's */
 #define ME8100_IOCTL_MAXNR 29
@@ -217,3 +250,4 @@
 #define ME8100_READ_ICSR        _IOR(ME8100_MAGIC, 27, unsigned char)
 #define ME8100_GET_BOARD_INFO   _IOR(ME8100_MAGIC, 28, me8100_info_type)
 #define ME8100_GET_INT_COUNT    _IOR(ME8100_MAGIC, 29, me8100_int_occur_type)
+