me8100.h
changeset 0 c9b8efdb5369
child 3 fc24e3b47731
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/me8100.h	Wed Jan 16 14:01:55 2002 +0100
@@ -0,0 +1,219 @@
+/* me8100.h */
+/* Device driver for Meilhaus me1000 board.
+ * ========================================
+ *
+ *  Copyright (C) 2001 Meilhaus Electronic GmbH (support@meilhaus.de)
+ *  
+ *  This file is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+
+      
+/*
+ * Source File : me8100.h
+ * Destination : me8100.o
+ * Author      : GG (Guenter Gebhardt)
+ *
+ * File History: Version   Date       Editor   Action
+ *---------------------------------------------------------------------
+ *               1.00.00   01.01.10   GG       first release
+ *                                                          
+ *               1.00.01   01.02.14   GG       Add new ioctls:
+ *                                              get_board_info
+ *                                              get_int count
+ *
+ *               1.01.00   01.10.08   GG       Port to Kernel 2.4
+ *---------------------------------------------------------------------
+ *
+ * Description:
+ *
+ *   Contains declarations and type definitions for the ME-8100
+ *   driver module.
+ *
+ */
+
+
+/* Please define this to enable debug mode */
+#undef ME8100_DEBUG
+
+#undef PDEBUG // only to be sure
+
+#ifdef ME8100_DEBUG
+# define PDEBUG(fmt, args...) printk(KERN_DEBUG"ME8100:" fmt, ##args)
+#else 
+# define PDEBUG(fmt, args...) // no debugging, do nothing
+#endif
+
+
+/* Meilhaus PCI vendor id */
+#define PCI_VENDOR_ID_MEILHAUS 0x1402
+
+/* ME-8100 device IDs */
+#define PCI_DEVICE_ID_MEILHAUS_ME8100_A  0x0810A  // Meilhaus ME8100 A
+#define PCI_DEVICE_ID_MEILHAUS_ME8100_B  0x0810B  // Meilhaus ME8100 B
+
+
+/* Count of different ME-8100 sorts = 2 */
+#define SORT_COUNT 2
+
+
+/* Device name, for entries in /proc/.. */
+#define ME8100_NAME "me8100"
+
+
+/* Maximum count of ME-8100 devices */
+#define ME8100_MAX_DEVICES 16
+
+
+/* Here you can enable the workaround for the plx bug */
+#define PLX_WORKAROUND_ENABLE 1
+
+
+/* Offset Interrupt Control Status Register of the PLX */
+#define PLX_ICSR 0x4C
+
+
+/* Size of register bases */
+#define ME8100_BASE_SIZE 0xFF
+#define PLX_BASE_SIZE 0x80
+
+
+/**************************************************/
+/* Bit definition for the ME8100_CTRL_REG_X       */
+/* it differs from the ISA VERSION !!!            */
+/* The other registers are similar to ISA VERSION */
+/**************************************************/
+// Bit 0-3 dont care
+// Bit 4   SRC/SINK    1 = SRC  0 = SINK
+// Bit 5   INTB 1      ISA has here INTB 0
+// Bit 6   INTB 0      ISA has here INTB 1
+// Bit 7   ENIO        1 = Enable  0 = high resistance
+// Bit 8-15 dont care
+/*********************************************************/
+/* The ME8100_ID_REG_X contains on PCI boards static 81h */
+/*********************************************************/
+
+/* ME8100 Register Set A */
+#define ME8100_ID_REG_A			0x00      //(r, )
+#define ME8100_CTRL_REG_A		0x00      //( ,w)
+#define ME8100_RES_INT_REG_A		0x02      //(r, )
+#define ME8100_DI_REG_A			0x04      //(r, )
+#define ME8100_DO_REG_A                 0x06      //( ,w)
+#define ME8100_PATTERN_REG_A		0x08      //( ,w)
+#define ME8100_MASK_REG_A		0x0A      //( ,w)
+#define ME8100_INT_DI_REG_A		0x0A      //(r, )
+									
+/* ME8100 Register Set B */		
+#define ME8100_ID_REG_B			0x0C      //(r, )
+#define ME8100_CTRL_REG_B		0x0C      //( ,w)
+#define ME8100_RES_INT_REG_B		0x0E      //(r, )
+#define ME8100_DI_REG_B			0x10      //(r, )
+#define ME8100_DO_REG_B			0x12      //( ,w)
+#define ME8100_PATTERN_REG_B	        0x14      //( ,w)
+#define ME8100_MASK_REG_B		0x16      //( ,w)
+#define ME8100_INT_DI_REG_B		0x16      //(r, )
+									
+/* ME8100 82C54 Counter Registers                          */
+/* 82C54 registers are adressed as 8-bit registers, so the */
+/* offset is in bytes.                                     */
+#define ME8100_COUNTER_REG_0		0x18      //(r,w)
+#define ME8100_COUNTER_REG_1		0x1A      //(r,w)
+#define ME8100_COUNTER_REG_2		0x1C      //(r,w)
+#define ME8100_COUNTER_CTRL_REG	        0x1E      //(r,w)
+
+/* Bitmasks for the PLX_ICSR register */
+#define LOCAL_INT1_EN             0x01  // local interrupt 1 enabled  (r,w)
+#define LOCAL_INT1_POL            0x02  // local interrupt 1 polarity (r,w)
+#define LOCAL_INT1_STATE          0x04  // local interrupt 1 state    (r, )
+#define LOCAL_INT2_EN             0x08  // local interrupt 2 enabled  (r,w)
+#define LOCAL_INT2_POL            0x10  // local interrupt 2 polarity (r,w)
+#define LOCAL_INT2_STATE          0x20  // local interrupt 2 state    (r, )
+#define PCI_INT_EN                0x40  // PCI interrupt enable       (r,w)
+#define SOFT_INT                  0x80  // Software interrupt         (r,w)
+
+
+typedef enum {  
+  ME8100_A, 
+  ME8100_B
+} me8100_version_enum_type; 
+
+
+typedef struct{
+  int int1;
+  int int2;
+} me8100_int_occur_type;
+
+
+typedef struct{
+  int board_count;                  /* index of the board after detection    */
+  me8100_version_enum_type version; /* sort of board                         */
+  unsigned int plx_regbase;         /* PLX configuration space base address  */
+  unsigned int me8100_regbase;      /* Base address of the ME8100/2000       */
+  unsigned int plx_regbase_size;    /* Size of PLX space                     */
+  unsigned int me8100_regbase_size; /* Size of ME8100 base address           */
+  unsigned int serial_no;           /* Serial number of the board            */
+  unsigned char hw_revision;        /* Hardware revision of the board        */
+  unsigned short vendor_id;         /* Meilhaus vendor id (0x1402)           */
+  unsigned short device_id;         /* Device ID                             */
+  int pci_bus_no;                   /* PCI bus number                        */
+  int pci_dev_no;                   /* PCI device number                     */
+  int pci_func_no;                  /* PCI function number                   */
+  char int_line;                    /* IRQ assigned from the PCI BIOS        */
+  int int1;                         /* Marks witch interrupt occured         */
+  int int2;                         /* Marks witch interrupt occured         */
+  int int_count_1;                  /* Count of interrupt 1                  */
+  int int_count_2;                  /* Count of interrupt 2                  */
+  int board_in_use;                 /* Indicates if board is already in use  */
+  spinlock_t use_lock;              /* Guards board in use                   */
+  struct file *file_ptr;            /* Pointer to file structure of path     */
+} me8100_info_type;
+
+
+/* ME8100 IOCTL's */
+#define ME8100_IOCTL_MAXNR 29
+#define ME8100_MAGIC 'o'
+#define ME8100_READ_ID_A        _IOR(ME8100_MAGIC, 0,  unsigned short)
+#define ME8100_WRITE_CTRL_A     _IOW(ME8100_MAGIC, 1,  unsigned short)
+#define ME8100_RES_INT_A        _IOR(ME8100_MAGIC, 2,  unsigned short)
+#define ME8100_READ_DI_A        _IOR(ME8100_MAGIC, 3,  unsigned short)
+#define ME8100_WRITE_DO_A       _IOW(ME8100_MAGIC, 4,  unsigned short)
+#define ME8100_WRITE_PATTERN_A  _IOW(ME8100_MAGIC, 5,  unsigned short)
+#define ME8100_WRITE_MASK_A     _IOW(ME8100_MAGIC, 6,  unsigned short)
+#define ME8100_READ_INT_DI_A    _IOR(ME8100_MAGIC, 7,  unsigned short)
+
+#define ME8100_READ_ID_B        _IOR(ME8100_MAGIC, 8,  unsigned short)
+#define ME8100_WRITE_CTRL_B     _IOW(ME8100_MAGIC, 9,  unsigned short)
+#define ME8100_RES_INT_B        _IOR(ME8100_MAGIC, 10, unsigned short)
+#define ME8100_READ_DI_B        _IOR(ME8100_MAGIC, 11, unsigned short)
+#define ME8100_WRITE_DO_B       _IOW(ME8100_MAGIC, 12, unsigned short)
+#define ME8100_WRITE_PATTERN_B  _IOW(ME8100_MAGIC, 13, unsigned short)
+#define ME8100_WRITE_MASK_B     _IOW(ME8100_MAGIC, 14, unsigned short)
+#define ME8100_READ_INT_DI_B    _IOR(ME8100_MAGIC, 15, unsigned short)
+
+#define ME8100_WRITE_COUNTER_0  _IOW(ME8100_MAGIC, 16, unsigned char)
+#define ME8100_WRITE_COUNTER_1  _IOW(ME8100_MAGIC, 17, unsigned char)
+#define ME8100_WRITE_COUNTER_2  _IOW(ME8100_MAGIC, 18, unsigned char)
+#define ME8100_READ_COUNTER_0   _IOR(ME8100_MAGIC, 19, unsigned char)
+#define ME8100_READ_COUNTER_1   _IOR(ME8100_MAGIC, 20, unsigned char)
+#define ME8100_READ_COUNTER_2   _IOR(ME8100_MAGIC, 21, unsigned char)
+#define ME8100_SETUP_COUNTER    _IOW(ME8100_MAGIC, 22, unsigned char)
+
+#define ME8100_GET_SERIAL       _IOR(ME8100_MAGIC, 23, unsigned int)
+#define ME8100_GET_NAME         _IOR(ME8100_MAGIC, 24,me8100_version_enum_type)
+#define ME8100_INT_OCCUR        _IOR(ME8100_MAGIC, 25, me8100_int_occur_type)
+#define ME8100_SETUP_ICSR       _IOW(ME8100_MAGIC, 26, unsigned char)
+#define ME8100_READ_ICSR        _IOR(ME8100_MAGIC, 27, unsigned char)
+#define ME8100_GET_BOARD_INFO   _IOR(ME8100_MAGIC, 28, me8100_info_type)
+#define ME8100_GET_INT_COUNT    _IOR(ME8100_MAGIC, 29, me8100_int_occur_type)