132 #define ME8100_CTRL_SINK 0x00 |
132 #define ME8100_CTRL_SINK 0x00 |
133 |
133 |
134 #define ME8100_CTRL_IRQ_PATTERN 0x40 |
134 #define ME8100_CTRL_IRQ_PATTERN 0x40 |
135 #define ME8100_CTRL_IRQ_MASK 0x60 |
135 #define ME8100_CTRL_IRQ_MASK 0x60 |
136 |
136 |
137 #define ME8100_CTRL_REG 0x00 //( ,w) |
137 #define ME8100_ID_REG 0x00 //(r, ) |
138 #define ME8100_MASK_REG 0x02 //(r, ) |
138 #define ME8100_CTRL_REG 0x00 //( ,w) |
139 #define ME8100_DI_REG 0x04 //(r, ) |
139 #define ME8100_RES_INT_REG 0x02 //(r, ) |
140 #define ME8100_DO_REG 0x06 //( ,w) |
140 #define ME8100_DI_REG 0x04 //(r, ) |
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141 #define ME8100_DO_REG 0x06 //( ,w) |
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142 #define ME8100_PATTERN_REG 0x08 //( ,w) |
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143 #define ME8100_MASK_REG 0x0A //( ,w) |
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144 #define ME8100_INT_DI_REG 0x0A //(r, ) |
141 |
145 |
142 /* ME8100 Register Set A */ |
146 /* ME8100 Register Set A */ |
143 #define ME8100_ID_REG_A 0x00 //(r, ) |
147 #define ME8100_ID_REG_A 0x00 //(r, ) |
144 #define ME8100_CTRL_REG_A 0x00 //( ,w) |
148 #define ME8100_CTRL_REG_A 0x00 //( ,w) |
145 #define ME8100_RES_INT_REG_A 0x02 //(r, ) |
149 #define ME8100_RES_INT_REG_A 0x02 //(r, ) |