me8100.h
changeset 14 c3f6d5e9713a
parent 13 f7fb771d7842
child 22 7b722739e329
equal deleted inserted replaced
13:f7fb771d7842 14:c3f6d5e9713a
   132 #define ME8100_CTRL_SINK		0x00
   132 #define ME8100_CTRL_SINK		0x00
   133 
   133 
   134 #define ME8100_CTRL_IRQ_PATTERN		0x40
   134 #define ME8100_CTRL_IRQ_PATTERN		0x40
   135 #define ME8100_CTRL_IRQ_MASK		0x60
   135 #define ME8100_CTRL_IRQ_MASK		0x60
   136 
   136 
   137 #define ME8100_CTRL_REG		       0x00	  //( ,w)
   137 #define ME8100_ID_REG	               0x00	 //(r, )
   138 #define ME8100_MASK_REG		       0x02	  //(r, )
   138 #define ME8100_CTRL_REG		       0x00	 //( ,w)
   139 #define ME8100_DI_REG		       0x04	  //(r, )
   139 #define ME8100_RES_INT_REG	       0x02      //(r, )
   140 #define ME8100_DO_REG		       0x06	  //( ,w)
   140 #define ME8100_DI_REG		       0x04	 //(r, )
       
   141 #define ME8100_DO_REG		       0x06	 //( ,w)
       
   142 #define ME8100_PATTERN_REG	       0x08	 //( ,w)
       
   143 #define ME8100_MASK_REG		       0x0A	 //( ,w)
       
   144 #define ME8100_INT_DI_REG	       0x0A      //(r, )
   141 
   145 
   142 /* ME8100 Register Set A */
   146 /* ME8100 Register Set A */
   143 #define ME8100_ID_REG_A			0x00      //(r, )
   147 #define ME8100_ID_REG_A			0x00      //(r, )
   144 #define ME8100_CTRL_REG_A		0x00      //( ,w)
   148 #define ME8100_CTRL_REG_A		0x00      //( ,w)
   145 #define ME8100_RES_INT_REG_A		0x02      //(r, )
   149 #define ME8100_RES_INT_REG_A		0x02      //(r, )
   214   int num_writer;
   218   int num_writer;
   215   int num_reader;
   219   int num_reader;
   216 
   220 
   217   int int_seen;
   221   int int_seen;
   218   int int_count;
   222   int int_count;
       
   223   unsigned short int_di;		    /* value that raised the interrupt */
   219 
   224 
   220   struct fasync_struct *fasync_ptr;
   225   struct fasync_struct *fasync_ptr;
   221   wait_queue_head_t readq;
   226   wait_queue_head_t readq;
   222 };
   227 };
   223 
   228