133 |
133 |
134 #define ME8100_CTRL_IRQ_PATTERN 0x40 |
134 #define ME8100_CTRL_IRQ_PATTERN 0x40 |
135 #define ME8100_CTRL_IRQ_MASK 0x60 |
135 #define ME8100_CTRL_IRQ_MASK 0x60 |
136 |
136 |
137 #define ME8100_CTRL_REG 0x00 //( ,w) |
137 #define ME8100_CTRL_REG 0x00 //( ,w) |
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138 #define ME8100_MASK_REG 0x02 //(r, ) |
138 #define ME8100_DI_REG 0x04 //(r, ) |
139 #define ME8100_DI_REG 0x04 //(r, ) |
139 #define ME8100_DO_REG 0x06 //( ,w) |
140 #define ME8100_DO_REG 0x06 //( ,w) |
140 |
141 |
141 /* ME8100 Register Set A */ |
142 /* ME8100 Register Set A */ |
142 #define ME8100_ID_REG_A 0x00 //(r, ) |
143 #define ME8100_ID_REG_A 0x00 //(r, ) |
169 |
170 |
170 /* Bitmasks for the PLX_ICSR register */ |
171 /* Bitmasks for the PLX_ICSR register */ |
171 #define LOCAL_INT1_EN 0x01 // local interrupt 1 enabled (r,w) |
172 #define LOCAL_INT1_EN 0x01 // local interrupt 1 enabled (r,w) |
172 #define LOCAL_INT1_POL 0x02 // local interrupt 1 polarity (r,w) |
173 #define LOCAL_INT1_POL 0x02 // local interrupt 1 polarity (r,w) |
173 #define LOCAL_INT1_STATE 0x04 // local interrupt 1 state (r, ) |
174 #define LOCAL_INT1_STATE 0x04 // local interrupt 1 state (r, ) |
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175 |
174 #define LOCAL_INT2_EN 0x08 // local interrupt 2 enabled (r,w) |
176 #define LOCAL_INT2_EN 0x08 // local interrupt 2 enabled (r,w) |
175 #define LOCAL_INT2_POL 0x10 // local interrupt 2 polarity (r,w) |
177 #define LOCAL_INT2_POL 0x10 // local interrupt 2 polarity (r,w) |
176 #define LOCAL_INT2_STATE 0x20 // local interrupt 2 state (r, ) |
178 #define LOCAL_INT2_STATE 0x20 // local interrupt 2 state (r, ) |
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179 |
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180 /* Sould be shifted left by 3 if it's used for device B */ |
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181 #define LOCAL_INT_EN 0x01 |
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182 #define LOCAL_INT_POL 0x02 |
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183 #define LOCAL_INT_STATE 0x04 |
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184 |
177 #define PCI_INT_EN 0x40 // PCI interrupt enable (r,w) |
185 #define PCI_INT_EN 0x40 // PCI interrupt enable (r,w) |
178 #define SOFT_INT 0x80 // Software interrupt (r,w) |
186 #define SOFT_INT 0x80 // Software interrupt (r,w) |
179 |
187 |
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188 typedef struct{ |
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189 int int1; |
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190 int int2; |
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191 } me8100_int_occur_type; |
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192 |
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193 #ifdef __KERNEL__ |
180 |
194 |
181 typedef enum { |
195 typedef enum { |
182 ME8100_A, |
196 ME8100_A, |
183 ME8100_B |
197 ME8100_B |
184 } me8100_version_enum_type; |
198 } me8100_version_enum_type; |
185 |
199 |
186 |
200 struct me8100_private_data { |
187 typedef struct{ |
201 unsigned long last_read; /* jiffies */ |
188 int int1; |
202 }; |
189 int int2; |
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190 } me8100_int_occur_type; |
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191 |
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192 #ifdef __KERNEL__ |
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193 |
203 |
194 struct me8100_subinfo { |
204 struct me8100_subinfo { |
195 unsigned int regbase; |
205 unsigned int regbase; |
196 unsigned short ctrl_reg; |
206 unsigned short ctrl_reg; |
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207 unsigned long last_change; |
197 int num_writer; |
208 int num_writer; |
198 }; |
209 }; |
199 |
210 |
200 typedef struct{ |
211 typedef struct{ |
201 int board_count; /* index of the board after detection */ |
212 int board_count; /* index of the board after detection */ |
215 int int1; /* Marks witch interrupt occured */ |
226 int int1; /* Marks witch interrupt occured */ |
216 int int2; /* Marks witch interrupt occured */ |
227 int int2; /* Marks witch interrupt occured */ |
217 int int_count_1; /* Count of interrupt 1 */ |
228 int int_count_1; /* Count of interrupt 1 */ |
218 int int_count_2; /* Count of interrupt 2 */ |
229 int int_count_2; /* Count of interrupt 2 */ |
219 int board_in_use; /* Indicates if board is already in use */ |
230 int board_in_use; /* Indicates if board is already in use */ |
220 spinlock_t use_lock; /* Guards board in use */ |
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221 struct file *file_ptr; /* Pointer to file structure of path */ |
231 struct file *file_ptr; /* Pointer to file structure of path */ |
222 struct fasync_struct *fasync_ptr; /* .hs */ |
232 struct fasync_struct *fasync_ptr; /* .hs */ |
223 struct me8100_subinfo subinfo[2]; /* .hs */ |
233 struct me8100_subinfo subinfo[2]; /* .hs */ |
224 } me8100_info_type; |
234 } me8100_info_type; |
225 |
235 |